Conventional two-phase bootstrap driver circuits, typically used to charge address lines of MOS read only memories (ROMs) have a bootstrap transistor, characterized by a capacitance between its gate and source, for selectively charging an address line of the ROM during an output phase in response to the application of an input signal to its gate during a prior input phase. The gate of the bootstrap transistor is isolated during the output phase so that the gate-source capacitance of the bootstrap transistor will cause the gate voltage to increase as the voltage of source, which is coupled to the address line, increases. Thus, the bootstrap transistor remains in its conductive mode and quickly charges the address line to the full supply voltage.
The input signals of conventional two-phase bootstrap driver circuits are provided by a capacitive output line of an address decoder. This output line is precharged during the output phase and selectively discharged during a subsequent input phase. The output line is coupled to the bootstrap transistor during the input phase for selectively charging or discharging its gate. However, since the output line of the address decoder and the gate of the bootstrap transistor are both characterized by capacitances, the charge on the output line is shared between the capacitances, reducing the voltage on the gate of the bootstrap transistor from the original voltage on the output line. Typically, the gate of the bootstrap transistor only achieves an amplitude of approximately 3 volts when a five volt supply is used. This low gate voltage results in a rate of charging of the address line that is slower than is desired.